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| VTM V*I Chip - VTM Voltage Transformation Module TM V048K020T080 K indicates BGA configuration. For other mounting options see Part Numbering below. * 48 V to 2 V V*I Chip Converter * 80 A (120 A for 1 ms) * High density - 320 A/in 3 * 125C operation * 1 s transient response * >3.5 million hours MTBF * Typical efficiency 94% at 2 V/50 A * No output filtering required * BGA or J-Lead packages Actual size (c) Vf = 26 - 55 V VOUT = 1.1 - 2.3 V IOUT = 80 A K = 1/24 ROUT = 1.5 m max * Small footprint - 75 A/in2 * Low weight - 0.5 oz (14 g) * Pick & Place / SMD Product Description Absolute Maximum Ratings Parameter +In to -In +In to -In PC to -In TM to -In VC to -In +Out to -Out Isolation voltage The V048K020T080 V*I Chip Voltage Transformation Module (VTM) breaks records for speed, density and efficiency to meet the demands of advanced DSP, FPGA, ASIC, processor cores and microprocessor applications at the point of load (POL) while providing isolation from input to output. It achieves a response time of less than 1 s and delivers up to 80 A in a volume of less than 0.25 in3 while providing low output voltages with unprecedented efficiency. It may be paralleled to deliver hundreds of amps at an output voltage settable from 1.1 to 2.3 Vdc. The VTM V048K020T080's nominal output voltage is 2 Vdc from a 48 Vdc input factorized bus, Vf, and is controllable from 1.1 to 2.3 Vdc at no load, and from 1.1 to 2.2 Vdc at full load, over a Vf input range of 26 to 55 Vdc. It can be operated either open- or closed-loop depending on the output regulation needs of the application. Operating open-loop, the output voltage tracks its Vf input voltage with a transformation ratio, K = 1/24, and an output resistance, ROUT = 1.3 milliohm, to enable applications requiring a programmable low output voltage at high current and high efficiency. Closing the loop back to an input Pre-Regulation Module (PRM) or DC-DC converter can compensate for ROUT. Values -1.0 to 60.0 100 -0.3 to 7.0 -0.3 to 7.0 -0.3 to 19.0 -0.1 to 4.0 2,250 Unit Vdc Vdc Vdc Vdc Vdc Notes For 100 ms P EL R I IM Output current Peak output current Storage temperature Output power Peak output power Operating junction temperature Case temperature during reflow RY A N Vdc Vdc C A -40 to 125 80 See Note Continuous 120 A For 1 ms 208 C -40 to 150 174 261 C W W Continuous For 1 ms Input to Output Note: The referenced junction is defined as the semiconductor having the highest temperature. This temperature is monitored by the temperature monitor (TM) signal and by a shutdown comparator. Part Numbering The 2 V VTM achieves break-through current density of 320 A/in3 in a V*I Chip package compatible with standard pick-and-place and surface mount assembly processes. The V*I Chip BGA package supports in-board mounting with a low profile of 0.16" (4 mm) over the board. A J-lead package option supports on-board surface mounting with a profile of only 0.25" (6 mm) over the board. The VTM's fast dynamic response and low noise eliminate the need for bulk capacitance at the load, substantially increasing the POL density while improving reliability and decreasing cost. Vicor Corporation Tel: 800-735-6200 vicorpower.com V Voltage Transformation Module 048 Input Voltage Designator K 020 Output Voltage Designator (=VOUT x10) T 080 Output Current Designator (=IOUT) Configuration Options F = On-board (Fig.15) K = In-board (Fig.14) Product Grade Temperatures (C) Grade Storage Operating T -40 to150 -40 to125 V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 1 of 15 Specifications INPUT (Conditions are at 48 Vin, full load, and 25C ambient unless otherwise specified) Parameter Input voltage range Input dV/dt Input overvoltage turn-on Input overvoltage turn-off Input current Input reflected ripple current No load power dissipation Internal input capacitance Internal input inductance Min 26 56.0 59.5 3.7 170 2.50 4 20 3.15 Typ 48 Max 55 1 Unit Vdc V/s Vdc Vdc Adc mA p-p W F nH Note Operable down to zero V with external bias voltage Using test circuit in Fig.16; See Fig.1 OUTPUT (Conditions are at 48 Vin, full load, and 25C ambient unless otherwise specified) Parameter Rated DC current Peak repetitive current DC current limit Current share accuracy Efficiency Half load Full load Internal output inductance Internal output capacitance Load capacitance Output overvoltage setpoint Output ripple voltage No external bypass 100 F bypass capacitor Effective switching frequency Line regulation K Load regulation ROUT Transient response Voltage overshoot Response time Recovery time 82 Min 0 Typ Max 80 120 112 10 Unit Adc A Note EL PR 94.0 93.0 2.52 0.0413 94.2 93.2 0.8 306 IN IM 99 5 Adc % 56,300 % % nH F F Vdc 65 2.78 0.0421 1.5 m mV ns s mV mV MHz 1/24 1.3 20 200 1 Max pulse width 1ms, max duty cycle 10%, baseline power 50% See Parallel Operation on page 10 Y AR See Fig.3, 2 Vout See Fig.3, 2 Vout Effective value 2.33 53 2 2.65 See Figs.2 and 5 See Fig.6 Fixed, 1.33 MHz per phase VOUT = K*VIN at no load See Fig.19 80 A load step with 100 F CIN; See Figs.7 and 8 See Figs.7 and 8 See Figs.7 and 8 Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 2 of 15 Specifications WAVEFORMS Output Ripple vs Load 60 50 Output Ripple (mV) 40 30 20 10 0 0 10 20 30 40 50 60 70 80 Output Currrent (A) Figure 1-- Input reflected ripple current at full load and 48 Vin Figure 2-- Output voltage ripple vs. output current at 2 Vout with no POL bypass capacitance. Efficiency vs. Output Current 95 94 93 2.0 V 1.8 V 1.5 V 1.2 V Power Dissipation vs. Output Current 14 12 2.0V 1.8V 1.5V 1.2V Power Disipation (W) Efficiency (%) 92 91 90 89 88 87 86 85 0 10 20 30 40 50 60 70 10 8 6 4 2 0 80 0 10 20 30 40 50 60 70 80 Output Current (A) Output Current (A) Figure 3-- Efficiency vs. output current and output voltage Figure 4--Power dissipation as a function of output current and output voltage Figure 5-- Output voltage ripple at full load and 2 Vout; without any external bypass capacitor. Vicor Corporation Tel: 800-735-6200 vicorpower.com Figure 6--Output voltage ripple at full load and 2 Vout with 100 F ceramic external bypass capacitance and 20 nH distribution inductance. V048K020T080 Rev. 1.2 Page 3 of 15 V*I Chip Voltage Transformation Module Specifications, continued PRELIMINARY Figure 7-- 0-80 A step load change with 100 F input capacitance and no output capacitance. GENERAL Parameter MTBF MIL-HDBK-217F Isolation specifications Voltage Capacitance Resistance Agency approvals (pending) Mechanical parameters Weight Dimensions(BGA version) Length Width Height Min Typ 3.5 2,250 2,500 10 cTUVus CE Mark 0.5 / 14.0 1.26 / 32 0.85 / 21.5 0.23 / 5.9 Max Figure 8-- 80-0 A step load change with 100 F input capacitance and no output capacitance. Unit Mhrs Vdc pF M Note 25C, GB Input to Output Input to Output Input to Output UL/CSA 60950, EN 60950 Low voltage directive See mechanical drawing, Figs.10 and 12 oz / g in / mm in / mm in / mm Auxiliary Pins (Conditions are at 48 Vin, full load, and 25C ambient unless otherwise specified) Parameter Primary Control (PC) DC voltage Module disable voltage Module enable voltage Current limit Disable delay time Temperature Monitor (TM) 27C setting Temperature coefficient Full range accuracy Current limit VTM Control (VC) External boost voltage External boost duration Min 4.8 2.4 2.4 Typ 5.0 2.5 2.5 2.5 4 3.00 10 5 100 12.0 14.0 10 19.0 Max 5.2 2.6 2.9 10 Unit Vdc Vdc Vdc mA s Vdc mV/C C A Vdc ms Note Source only PC low to Vout low Operating junction temperature Operating junction temperature Source only Required for VTM start up without PRM Vin must be >26 V for VTM to remain operating without boost voltage. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 4 of 15 Specifications, continued THERMAL Symbol Parameter Over temperature shutdown Thermal capacity Junction-to-case thermal impedance Junction-to-BGA thermal impedance Junction-to-ambient 1 Junction-to-ambient 2 Min 125 Typ 130 0.61 1.1 2.1 6.5 5.0 Max 135 Unit C Ws/C C/W C/W C/W C/W Note Junction temperature RJC RJB RJA RJA Notes 1. V048K020T080 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM. 2. V048K020T080 with a 0.25"H heatsink surface mounted on FR4 board, 300 LFM. V*I CHIP STRESS DRIVEN PRODUCT QUALIFICATION PROCESS Test High Temperature Operational Life (HTOL) Temperature cycling High temperature storage Moisture resistance Temperature Humidity Bias Testing (THB) Pressure cooker testing (Autoclave) Highly Accelerated Stress Testing (HAST) Solvent resistance/marking permanency Mechanical vibration Mechanical shock Electro static discharge testing - human body model Electro static discharge testing - machine model Highly Accelerated Life Testing (HALT) Dynamic cycling Standard JESD22-A-108-B JESD22-A-104B JESD22-A-103A JESD22-A113-B EIA/JESD22-A-101-B JESD22-A-102-C JESD22-A-110B JESD22-B-107-A JESD22-B-103-A JESD22-B-104-A EIA/JESD22-A114-A EIA/JESD22-A115-A Per Vicor Internal Test Specification* Per Vicor internal test specification* EL PR I IM RY NA Operation limits verified, destruct margin determined Constant line, 0-100% load, -20C to 125C Environment 125C, Vmax, 1,008 hrs -55C to 125C, 1,000 cycles 150C, 1,000 hrs Moisture sensitivity Level 5 85C, 85% RH, Vmax, 1,008 hrs 121C, 100% RH, 15 PSIG, 96 hrs 130C, 85% RH, Vmax, 96 hrs Solvents A, B & C as defined 20g peak, 20-2,000 Hz, test in X, Y & Z directions 1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions Meets or exceeds 2,000 Volts Meets or exceeds 200 Volts * For details of the test protocols see Vicor's website. V*I CHIP BALL GRID ARRAY INTERCONNECT QUALIFICATION Test BGA solder fatigue evaluation Solder ball shear test Standard IPC-9701 IPC-SM-785 IPC-9701 Environment Cycle condition: TC3 (-40 to +125C) Test duration: NTC-B (500 failure free cycles) Failure through bulk solder or copper pad lift-off Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 5 of 15 Pin/Control Functions +IN/-IN DC VOLTAGE PORTS PRELIMINARY 43 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH AJ AK AL 21 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH AJ AK AL The VTM input should not exceed the high end of the range specified. Be aware of this limit in applications where the VTM is being driven above its nominal output voltage. A 14 V source must be applied to the VC pin and voltage must be present at the +In and -In ports in order for the VTM to process power. If the input voltage exceeds the over voltage lock-out, the VTM will shutdown. The VTM does not have internal input reverse polarity protection. Adding a properly sized diode in series with the positive input or a fused reverse-shunt diode will provide reverse polarity protection. VC - VTM Control The VC port is multiplexed. It receives the initial Vcc voltage from an upstream PRM, synchronizing the output rise of the VTM with the output rise of the PRM. Additionally, the VC port provides feedback to the PRM to compensate for the VTM output resistance. In typical applications using VTMs powered from PRMs, the PRM's VC port should be connected to the VTM VC port. In applications where a VTM is being used without a PRM, 14 V must be supplied to the VC port for approximately 10 ms in order for the VTM to startup. The VTM can be operated at input voltages below 26 V as long as the VC voltage is applied. PC - Primary Control +Out +In -Out Temp. Monitor VTM Control Primary Control +Out -In -Out Bottom View Figure 9--VTM BGA configuration Signal Name +In -In TM VC PC +Out -Out BGA Designation A1-L1, A2-L2 AA1-AL1, AA2-AL2 P1, P2 T1, T2 V1, V2 A3-G3, A4-G4, U3-AC3, U4-AC4 J3-R3, J4-R4, AE3-AL3, AE4-AL4 The Primary Control (PC) pin is a multifunction pin for controlling the VTM as follows: Disable - If the PC is left floating, the VTM output is enabled. To disable the output, the PC pin must be pulled lower than 2.4 V, referenced to -In. Optocouplers, open collector transistors or relays can be used to control the PC pin. Once disabled, 14 V must be re-applied to the VC pin in order to restart the VTM Primary Auxiliary Supply - The PC port can source up to 2.4 mA at 5 Vdc. TM - Temperature Monitor The Temperature Monitor (TM) provides a linear output proportional to the internal temperature of the VTM. At 300K (+27C) the TM output is 3.0 V referenced to -In and varies 10 mV/C. TM accuracy is +/-5C. This feature is useful for validating the thermal design of the system as well as monitoring the VTM temperature in the final application. EL PR I IM RY NA +OUT/-OUT DC Voltage Output Ports The output (+OUT) and output return (-OUT) are through two sets of contact locations. The respective +OUT and -OUT groups must be connected in parallel with as low an interconnect resistance as possible. Within the specified input voltage range, the Level 1 DC behavioral model shown in Figure 19 defines the output voltage of the VTM. The current source capability of the VTM is shown in the specification table. To take full advantage of the VTM, the user should note the low output impedance of the device. The low output impedance provides fast transient response without the need for bulk POL capacitance. Limited-life electrolytic capacitors required with conventional converters can be reduced or even eliminated, saving cost and valuable board real estate. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 6 of 15 Mechanical Drawings PRELIMINARY 1,00 0.039 1,00 0.039 9,00 0.354 SOLDER BALL #A1 18,00 0.709 SOLDER BALL #A1 INDICATOR 21,5 0.85 5,9 0.23 (106) X O 0.020 SOLDER BALL 0.51 1,00 TYP 0.039 OUTPUT 30,00 1.181 INPUT INPUT OUTPUT 32,0 1.26 28,8 1.13 16,0 0.63 C L 15,00 0.591 TOP VIEW (COMPONENT SIDE) 1,6 0.06 C L BOTTOM VIEW 1,00 0.039 3,9 0.15 NOTES: mm 1- DIMENSIONS ARE inch . 2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005] 3- PRODUCT MARKING ON TOP SURFACE 15,6 0.62 SEATING PLANE Figure 10--VTM BGA mechanical outline; In-board mounting IN-BOARD MOUNTING BGA surface mounting requires a cutout in the PCB in which to recess the V*I Chip 0,51 (o ) 0.020 SOLDER MASK DEFINED PADS 1,50 0.059 ( 1,00 ) 0.039 0,50 0.020 o 0,53 PLATED VIA 0.021 CONNECT TO INNER LAYERS 0,50 0.020 ( 1,00 ) 0.039 1,00 0.039 9,00 0.354 1 18,00 0.709 1,00 0.039 1,00 0.039 SOLDER PAD #A1 (2) X 10,00 0.394 +IN (4) X 6,00 0.236 +OUT1 -OUT1 RECOMMENDED LAND AND VIA PATTERN TM (COMPONENT SIDE SHOWN) PCB CUTOUT VC 29,26 1.152 24,00 0.945 16,00 0.630 8,00 0.315 0,37 0.015 1,6 (4) X R 0.06 NOTES: mm 1- DIMENSIONS ARE inch . 2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005] 20,00 0.787 17,00 0.669 15,00 13,00 0.591 0.512 +OUT2 -IN PC 31 -OUT2 (106) X o 0,51 0.020 8,08 0.318 16,16 0.636 SOLDER MASK DEFINED PAD Figure 11-- VTM BGA PCB land/VIA layout information; In-board mounting Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 7 of 15 Mechanical Drawings PRELIMINARY 22,0 0.87 6,1 0.24 3,01 0.118 15,99 0.630 3,01 0.118 (4) PL. 7,10 0.280 OUTPUT INPUT 11,10 (2) PL. 0.437 32,0 1.26 INPUT 24,00 0.945 16,00 0.630 TOP VIEW (COMPONENT SIDE) Figure 12--VTM J-lead mechanical outline; On-board mounting (4) X 11,48 0.452 (6) X 1,60 0.063 +IN 20,00 (2) X 0.787 (2) X16,94 0.667 (2) X14,94 0.588 12,94 (2) X 0.509 PC VC TM -IN Figure 13-- VTM J-lead PCB land layout information; On-board mounting Vicor Corporation Tel: 800-735-6200 vicorpower.com OUTPUT NOTES: 1- DIMENSIONS ARE mm/[INCH]. 3,26 0.128 1,38 0.054 TYP 15,74 0.620 C L 15,55 0.612 8,00 0.315 C L 12,94 0.509 14,94 0.588 16,94 0.667 20,00 0.787 0,45 0.018 BOTTOM VIEW 2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005] 3- PRODUCT MARKING ON TOP SURFACE 3,26 0.128 0,51 TYP 0.020 RECOMMENDED LAND PATTERN (COMPONENT SIDE SHOWN) V*I Chip Voltage Transformation Module +OUT1 -OUT1 +OUT2 -OUT2 8,00 (2) X 0.315 (2) X 16,00 0.630 7,48 (8) X 0.295 (2) X 24,00 0.945 NOTES: 1- DIMENSIONS ARE mm/[INCH]. 2- UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: .X/[.XX] = +/-0.25/[.01]; .XX/[.XXX] = +/-0.13/[.005] V048K020T080 Rev. 1.2 Page 8 of 15 CONFIGURATION OPTIONS CONFIGURATION Effective Current Density Junction-Board Thermal Resistance Junction-Case Thermal Resistance Junction-Ambient Thermal Resistance 300LFM IN-BOARD* (Fig. 14) 467 A/in3 2.1 C/W 1.1 C/W 6.5 C/W ON-BOARD* (Fig. 15) 292 A/in3 2.4 C/W 1.1 C/W 6.8 C/W IN-BOARD WITH 0.25" HEATSINK 182 A/in3 2.1 C/W N/A 5.0 C/W ON-BOARD WITH 0.25" HEATSINK 146 A/in3 2.4 C/W N/A 5.0 C/W *Surface mounted to a 2" x 2" FR4 board, 4 layers 2 oz Cu 21.5 0.85 22.0 0.87 32.0 1.26 32.0 1.26 4.0 0.16 IN-BOARD MOUNT (V*I Chip recessed into PCB) Figure 14--In-board mounting - package K EL PR I IM mm in Figure 15--On-board mounting - package F RY A N 6.3 0.25 ON-BOARD MOUNT mm in Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 9 of 15 Configuration Options (Cont.) PRELIMINARY Input reflected ripple measurement point F1 7A Fuse +In +Out + 15 m Load -Out C1 100 F Al electrolytic 0.47 F ceramic C2 TM VC PC 14 V VTM +Out + - -In K Ro C3 100 F - -Out + Temperature Monitor - Notes: C3 should be placed close to the load Figure 16--VTM test circuit Application Note Parallel Operation In applications requiring higher current or redundancy, VTMs can be operated in parallel without adding control circuitry or signal lines. To maximize current sharing accuracy, it is imperative that the source and load impedance on each VTM in a parallel array be equal. If VTMs are being fed by an upstream PRM, the VC nodes of all VTMs must be connectd to the PRM VC. To achieve matched impedances, dedicated power planes within the PC board should be used for the output and output return paths to the array of paralleled VTMs. This technique is preferable to using traces of varying size and length. The VTM power train and control architecture allow bi-directional power transfer when the VTM is operating within its specified ranges. Bi-directional power processing improves transient response in the event of an output load dump. The VTM may operate in reverse, returning output power back to the input source. It does so efficiently. Thermal Management The high efficiency of the VTM results in low power dissipation minimizing temperature rise, even at full output current. The heat generated within the internal semiconductor junctions is coupled through very low thermal resistances, RJC and RJB (see Figure 17), to the PC board allowing flexible thermal management. CASE 1 Convection via optional heatsink to air At 2 Vout and full rated current (80A), the VTM dissipates approximately 12 W per Figure 4. This results in a temperature rise of approximately 56 C, allowing operation in an air temperature of 69 C without exceeding the 125 C max junction temperature. CASE 2 Conduction via the PC board to air The low Junction to BGA thermal resistance allows the use of the PC board as a means of removing heat from the VTM. Convection from the PC board to ambient, or conduction to a cold plate, enable flexible thermal management options. 2 With a VTM mounted on a 2.0 in area of a multi-layer PC board with appropriate power planes resulting in 8 oz of effective copper weight, the Junction-to-BGA thermal resistance, RJA, is 6.5 C/W in 300 LFM of air. With a maximum junction temperature of 125 C and 12 W of dissipation at full current of 80 A, the resulting temperature rise of 76 C allows the VTM to operate at full rated current up to a 49 C ambient temperature. See thermal resistances on page 9 for additional details on this thermal management option. Adding low-profile heat sinks to the PC board can lower the thermal resistance of the PC board surrounding the VTM. Additional cooling may be added by coupling a cold plate to the PC board with low thermal resistance stand offs. CASE 3 Combined direct convection to the air and conduction to the PC board. A combination of cooling techniques that utilize the power planes and dissipation to the air will also reduce the total thermal impedance. This is the most effective cooling method. To estimate the total effect of the combination, treat each cooling branch as one leg of a parallel resistor network. In an environment with forced convection over the surface of a PCB with 0.4" of headroom, a VTM with a 0.25 heat sink offers a simple thermal management option. The total Junction toAmbient thermal resistance of a surface mounted V048K020T080 with a heat sink attached is 4.8 C/W in 300 LFMairflow, (see Figure 18). Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 10 of 15 Application Note (continued) PRELIMINARY VTM with 0.25'' heat sink 10 9 8 7 Tja 6 5 4 3 0 100 200 300 400 500 600 Airflow (LFM) Figure 17--Thermal resistance Figure 18--Junction-to-ambient thermal resistance of VTM with 0.25" Heat Sink. V*I Chip VTM LEVEL 1 DC BEHAVIORAL MODEL for 48V to 2V, 80A IOUT ROUT 1.3 m + 1/24 * Iout + V*I 1/24 * Vin VIN IQ 52 mA + - K + VOUT - - (c) - Figure 19--This model characterizes the DC operation of the V*I Chip VTM, including the converter transfer function and its losses. The model enables estimates or simulations of output voltage as a function of input voltage and output load, as well as total converter power dissipation or heat generation. V*I Chip VTM LEVEL 2 TRANSIENT BEHAVIORAL MODEL for 48V to 2V, 80A 0.12 nH LIN = 20 nH IOUT ROUT 1.3 m LOUT = 0.8 nH + RCIN CIN VIN 4 F 1.3 m 1/24 * Iout V*I 0.6 m 1/24 * Vin 65 RCOUT 306 F + IQ 52 mA + - K + - COUT VOUT - - (c) Figure 20--This model characterizes the AC operation of the V*I Chip VTM including response to output load or input voltage transients or steady state modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load with or without external filtering elements. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 11 of 15 Application Note (continued) In figures 21 - 24; K = VTM Transformation Ratio Ro = VTM Output Resistance FPA Adaptive Loop Vf = PRM Output (Factorized Bus Voltage) Vo = VTM Output VL = Desired Load Voltage Vo = VL 1.0% VC PC TM IL NC PR VH SC SG OS NC CD Rs PRM-AL +In +Out Factorized Power Bus Vf = VL (Io*Ro) + K K +In +Out -Out TM VC PC VTM +Out Vin -In -Out -In K Ro L O A D -Out Figure 21 -- The PRM controls the factorized bus voltage, Vf, in proportion to output current to compensate for the output resistance, Ro, of the VTM. The VTM output voltage is typically within 1% of the desired load voltage (VL) over all line and load conditions. FPA Non-isolated Remote Loop Remote Loop Control VC PC TM IL NC PR VH SC SG OS NC CD Vo = VL 0.4% PRM-AL +In +Out Factorized Power Bus Vf = f (Vs) +In +Out +S -Out TM VC PC VTM +Out Vin -In -Out -In K Ro -S -Out L O A D Figure 22 -- An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output - the factorized bus - as a function of output current, compensating for the output resistance of the VTM and for distribution resistance. FPA Isolated Remote Loop Remote Loop Control Vo = VL 0.4% VC PC TM IL NC PR +In VS FB FG NC NC NC +In +Out PRM-IF Factorized Power Bus Vf = f (Vs) +S -Out TM VC PC +Out VTM +Out Vin -In -Out -In K Ro -S -Out L O A D Figure 23--An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output - the factorized bus - as a function of output current, compensating for the output resistance of the VTM and for distribution resistance. The factorized bus voltage (Vf) increases in proportion to load current. The remote feed back loop is isolated within the PRM to support galvanic isolation and hipot compliance at the system level. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 12 of 15 Application Note (continued) V*I Chip Soldering Recommendations PRELIMINARY V*I Chip modules are intended for reflow soldering processes. The following information defines the processing conditions required for successful attachment of a V*I Chip to a PCB. Failure to follow the recommendations provided can result in aesthetic or functional failure of the module. Storage V*I Chip modules are currently rated at MSL 5. Exposure to ambient conditions for more than 72 hours requires a 24 hour bake at 125C to remove moisture from the package. Solder Paste Stencil Design Solder paste is recommended for a number of reasons, including overcoming minor solder sphere co-planarity issues as well as simpler integration into overall SMD process. 63/37 SnPb, either no-clean or water-washable, solder paste should be used. Pb-free development is underway. The recommended stencil thickness is 6 mils. The apertures should be 20 mils in diameter for the In-Board (BGA) application and 0.9-0.9:1 for the On-Board (J-Leaded). Pick & Place In-Board (BGA) modules should be placed as accurately as possible to minimize any skewing of the solder joint; a maximum offset of 10 mils is allowable. On-Board (J-Leaded) modules should be placed within 5 mils. To maintain placement position, the modules should not be subjected to acceleration greater than 500 in/sec2 prior to reflow. Reflow There are two temperatures critical to the reflow process; the solder joint temperature and the module's case temperature. The solder joint's temperature should reach at least 220C, with a time above liquidus (183C) of ~30 seconds. The module's case temperature must not exceed 208 C at anytime during reflow. Because of the T needed between the pin and the case, a forcedair convection oven is preferred for reflow soldering. This reflow method generally transfers heat from the PCB to the solder joint. The module's large mass also reduces its temperature rise. Care should be taken to prevent smaller devices from excessive temperatures. Reflow of modules onto a PCB using Air-Vac-type equipment is not recommended due to the high temperature the module will experience. Inspection For the BGA-version, a visual examination of the post-reflow solder joints should show relatively columnar solder joints with no bridges. An inspection using x-ray equipment can be done, but the module's materials may make imaging difficult. The J-Lead version's solder joints should conform to IPC 12.2 * Properly Wetted Fillet must be evident * Heel fillet height must exceed lead thickness plus solder thickness. Removal and Rework V*I Chip modules can be removed from PCBs using special tools such as those made by Air-Vac. These tools heat a very localized region of the board with a hot gas while applying a tensile force to the component (using vacuum). Prior to component heating and removal, the entire board should be heated to 80-100C to (c) decrease the component heating time as well as local PCB warping. If there are adjacent moisture-sensitive components, a 125C bake should be used prior to component removal to prevent popcorning. V*I Chip modules should not be expected to survive a removal operation. 239 Joint Temperature, 220C Case Temperature, 208C 183 165 degC 91 16 Soldering Time Figure 25--Thermal profile diagram Figure 26-- Properly reflowed V*I Chip J-Lead. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 13 of 15 Application Note (continued) Input Impedance Recommendations PRELIMINARY Input Fuse Recommendations V*I Chips are not internally fused in order to provide flexibility in power system configuration. However, input line fusing of V*I Chips must always be incorporated within the power system. A fast acting fuse, such as NANO2 FUSE 451 Series 7 A 125 V, is required to meet safety agency Conditions of Acceptability. The input line fuse should be placed in series with the +IN port. To take full advantage of the VTM's capabilities, the impedance of the source (input source plus the PC board impedance) must be low over a range from DC to 5 MHz. The input of the VTM (factorized bus) should be locally bypassed with a 8 F low Q aluminum electrolytic capacitor. Additional input capacitance may be added to improve transient performance or compensate for high source impedance. The VTM has extremely wide bandwidth so the source response to transients is usually the limiting factor in overall output response of the VTM. Anomalies in the response of the source will appear at the output of the VTM, multiplied by its K factor of 1/24. The DC resistance of the source should be kept as low as possible to minimize voltage deviations on the input to the VTM. If the VTM is going to be operating close to the high limit of its input range, make sure input voltage deviations will not trigger the over voltage shutdown. Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 14 of 15 Vicor's comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor's Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (issued U.S. and Foreign Patents and pending patent applications) relating to the product described in this data sheet including; * The electrical and thermal utility of the V*I Chip package * The design of the V*I Chip package * The Power Conversion Topology utilized in the V*I Chip package * The Control Architecture utilized in the V*I Chip package * The Factorized Power Architecture. Purchase of this product conveys a license to use it. However, no responsibility is assumed by Vicor for any infringement of patents or other rights of third parties which may result from its use. Except for its use, no license is granted by implication or otherwise under any patent or patent rights of Vicor or any of its subsidiaries. Anybody wishing to use Vicor proprietary technologies must first obtain a license. Potential users without a license are encouraged to first contact Vicor's Intellectual Property Department. Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 Email Vicor Express: vicorexp@vicr.com Technical Support: apps@vicr.com Vicor Corporation Tel: 800-735-6200 vicorpower.com V*I Chip Voltage Transformation Module V048K020T080 Rev. 1.2 Page 15 of 15 06/05 |
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